Changeset 0b5ac364 in mainline

Timestamp:

2005-11-08T18:02:44Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e2ec980f

Parents:

0187fd0

Message:

Get the memory barriers on ia32 right.

File:

• arch/ia32/include/barrier.h (modified) (3 diffs)

arch/ia32/include/barrier.h

@@ -30 +30 @@
 #define __ia32_BARRIER_H__
 
+#include <arch/types.h>
+
 /*
  * NOTE:
@@ -44 +46 @@
 #define CS_LEAVE_BARRIER()      __asm__ volatile ("" ::: "memory")
 
+static inline void cpuid_serialization(void)
+{
+        __asm__ volatile (
+                "xorl %%eax, %%eax\n"
+                "cpuid\n"
+                ::: "eax", "ebx", "ecx", "edx", "memory"
+        );
+}
+
 #ifdef CONFIG_FENCES_P4
 #       define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory")
@@ -49 +60 @@
 #       define write_barrier()          __asm__ volatile ("sfence\n" ::: "memory")
 #elif CONFIG_FENCES_P3
-#       define memory_barrier() __asm__ volatile ("\n" ::: "memory")
-#       define read_barrier()           __asm__ volatile ("\n" ::: "memory")
+#       define memory_barrier()         cpuid_serialization()
+#       define read_barrier()           cpuid_serialization()
 #       define write_barrier()          __asm__ volatile ("sfence\n" ::: "memory")
+#else
+#       define memory_barrier()         cpuid_serialization()
+#       define read_barrier()           cpuid_serialization()
+#       define write_barrier()          cpuid_serialization()
 #endif