Changeset 0b917dd in mainline


Ignore:
Timestamp:
2006-06-11T17:02:17Z (19 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
43752b6
Parents:
e5dc7b8
Message:

Fix prein/predec instructions to be the same as on ia32.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/amd64/include/atomic.h

    re5dc7b8 r0b917dd  
    5353static inline long atomic_postinc(atomic_t *val)
    5454{
    55         long r;
     55        long r = 1;
    5656
    5757        __asm__ volatile (
    58                 "movq $1, %0\n"
    59                 "lock xaddq %0, %1\n"
    60                 : "=r" (r), "=m" (val->count)
     58                "lock xaddq %1, %0\n"
     59                : "=m" (val->count) : "r" (r)
    6160        );
    6261
     
    6665static inline long atomic_postdec(atomic_t *val)
    6766{
    68         long r;
     67        long r = -1;
    6968       
    7069        __asm__ volatile (
    71                 "movq $-1, %0\n"
    72                 "lock xaddq %0, %1\n"
    73                 : "=r" (r), "=m" (val->count)
     70                "lock xaddq %1, %0\n"
     71                : "=m" (val->count) : "r" (r)
    7472        );
    7573       
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