Changeset 10e0cee in mainline for arch/ppc32/src/mm/as.c

Timestamp:

2006-06-18T00:31:14Z (19 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1bb2e7a

Parents:

8e3bf3e2

Message:

ppc32: BAT-less memory mapping (broken yet)
VSID support (broken yet)
boot API change
cleanup

File:

• arch/ppc32/src/mm/as.c (modified) (2 diffs)

arch/ppc32/src/mm/as.c

@@ -35 +35 @@
 #include <arch/mm/as.h>
 #include <genarch/mm/as_pt.h>
+#include <genarch/mm/asid_fifo.h>
+#include <arch.h>
 
 /** Architecture dependent address space init. */
@@ -40 +42 @@
 {
         as_operations = &as_pt_operations;
+        asid_fifo_init();
+}
+
+/** Install address space.
+ *
+ * Install ASID.
+ *
+ * @param as Address space structure.
+ *
+ */
+void as_install_arch(as_t *as)
+{
+        asid_t asid;
+        ipl_t ipl;
+        __u8 sr;
+
+        ipl = interrupts_disable();
+        spinlock_lock(&as->lock);
+        
+        asid = as->asid;
+        
+        /* Lower 2 GB, user and supervisor access */
+        for (sr = 0; sr < 8; sr++) {
+                asm volatile (
+                        "mtsrin %0, %1\n"
+                        :
+                        : "r" (0x6000 + (asid << 4) + sr), "r" (sr * 0x1000)
+                );
+        }
+        
+        /* Upper 2 GB, only supervisor access */
+        for (sr = 8; sr < 16; sr++) {
+                asm volatile (
+                        "mtsrin %0, %1\n"
+                        :
+                        : "r" (0x4000 + (asid << 4) + sr), "r" (sr * 0x1000)
+                );
+        }
+        
+        spinlock_unlock(&as->lock);
+        interrupts_restore(ipl);
 }