Changeset 29c1282 in mainline for libc/arch/mips32/src/syscall.c
- Timestamp:
- 2006-03-20T13:36:17Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 255ec35
- Parents:
- 06b0d112
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
libc/arch/mips32/src/syscall.c
r06b0d112 r29c1282 37 37 register sysarg_t __mips_reg_a2 asm("$6") = p3; 38 38 register sysarg_t __mips_reg_a3 asm("$7") = p4; 39 register sysarg_t __mips_reg_t0 asm("$8") = id; 40 register sysarg_t __mips_reg_v0 asm("$2"); 39 register sysarg_t __mips_reg_v0 asm("$2") = id; 41 40 42 41 asm volatile ( … … 47 46 "r" (__mips_reg_a2), 48 47 "r" (__mips_reg_a3), 49 "r" (__mips_reg_ t0)48 "r" (__mips_reg_v0) 50 49 ); 51 50
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