Changeset 3b3e776 in mainline for uspace/lib/libc/arch/arm32/src/syscall.c

Timestamp:

2010-02-05T10:57:50Z (15 years ago)

Author:

Lenka Trochtova <trochtova.lenka@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0358da0

Parents:

3f085132 (diff), b4cbef1 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

merged with head

File:

• uspace/lib/libc/arch/arm32/src/syscall.c (modified) (2 diffs)

uspace/lib/libc/arch/arm32/src/syscall.c

@@ -60 +60 @@
         register sysarg_t __arm_reg_r5 asm("r5") = p6;
         register sysarg_t __arm_reg_r6 asm("r6") = id;
-
-        asm volatile ( "swi"
+        
+        asm volatile (
+                "swi 0"
                 : "=r" (__arm_reg_r0)
                 : "r" (__arm_reg_r0),
@@ -71 +72 @@
                   "r" (__arm_reg_r6)
         );
-
+        
         return __arm_reg_r0;
 }