Changeset 3daba42e in mainline

Timestamp:

2019-04-06T09:27:04Z (6 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

3b81644b, 3d0fd0d

Parents:

534bcdf

Message:

Always chain pic0 and pic1 using IRQ 2

Location:

kernel

Files:

• arch/amd64/src/amd64.c (modified) (1 diff)
• arch/ia32/src/ia32.c (modified) (1 diff)
• arch/mips32/src/mach/malta/malta.c (modified) (1 diff)
• genarch/include/genarch/drivers/i8259/i8259.h (modified) (2 diffs)
• genarch/src/drivers/i8259/i8259.c (modified) (9 diffs)

kernel/arch/amd64/src/amd64.c

@@ -121 +121 @@
                 /* PIC */
                 i8259_init((i8259_t *) I8259_PIC0_BASE,
-                    (i8259_t *) I8259_PIC1_BASE, IRQ_PIC1, IVT_IRQBASE);
+                    (i8259_t *) I8259_PIC1_BASE, IVT_IRQBASE);
 
                 /*

kernel/arch/ia32/src/ia32.c

@@ -110 +110 @@
                 /* PIC */
                 i8259_init((i8259_t *) I8259_PIC0_BASE,
-                    (i8259_t *) I8259_PIC1_BASE, IRQ_PIC1, IVT_IRQBASE);
+                    (i8259_t *) I8259_PIC1_BASE, IVT_IRQBASE);
 
                 /*

kernel/arch/mips32/src/mach/malta/malta.c

@@ -99 +99 @@
         irq_init(ISA_IRQ_COUNT, ISA_IRQ_COUNT);
 
-        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0);
+        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 0);
 
         int_handler[INT_HW0] = malta_isa_irq_handler;

kernel/genarch/include/genarch/drivers/i8259/i8259.h

@@ -52 +52 @@
 #define PIC_OCW4_NSEOI     (1 << 5)
 
-#define PIC_IRQ_COUNT      8
-#define PIC_SPURIOUS_IRQ   7
+#define PIC0_IRQ_COUNT      8
+#define PIC1_IRQ_COUNT      8
+
+#define PIC0_IRQ_PIC1       2
 
 typedef struct {
@@ -60 +62 @@
 } __attribute__((packed)) i8259_t;
 
-extern void i8259_init(i8259_t *, i8259_t *, inr_t, unsigned int);
+extern void i8259_init(i8259_t *, i8259_t *, unsigned int);
 extern void pic_enable_irqs(uint16_t);
 extern void pic_disable_irqs(uint16_t);

kernel/genarch/src/drivers/i8259/i8259.c

@@ -47 +47 @@
 static i8259_t *saved_pic1;
 
-void i8259_init(i8259_t *pic0, i8259_t *pic1, inr_t pic1_irq,
-    unsigned int irq0_vec)
+void i8259_init(i8259_t *pic0, i8259_t *pic1, unsigned int irq0_vec)
 {
         saved_pic0 = pic0;
@@ -59 +58 @@
         pio_write_8(&pic0->port2, irq0_vec);
 
-        /* ICW3: pic1 using IRQ IRQ_PIC1 */
-        pio_write_8(&pic0->port2, 1 << pic1_irq);
+        /* ICW3: pic1 using IRQ PIC0_IRQ_PIC1 */
+        pio_write_8(&pic0->port2, 1 << PIC0_IRQ_PIC1);
 
         /* ICW4: i8086 mode */
@@ -69 +68 @@
 
         /* ICW2: IRQ 8 maps to interrupt vector address irq0_vec + 8 */
-        pio_write_8(&pic1->port2, irq0_vec + PIC_IRQ_COUNT);
+        pio_write_8(&pic1->port2, irq0_vec + PIC0_IRQ_COUNT);
 
-        /* ICW3: pic1 is known as IRQ_PIC1 */
-        pio_write_8(&pic1->port2, pic1_irq);
+        /* ICW3: pic1 is known as PIC0_IRQ_PIC1 */
+        pio_write_8(&pic1->port2, PIC0_IRQ_PIC1);
 
         /* ICW4: i8086 mode */
@@ -78 +77 @@
 
         pic_disable_irqs(0xffff);               /* disable all irq's */
-        pic_enable_irqs(1 << pic1_irq);         /* but enable pic1_irq */
+        pic_enable_irqs(1 << PIC0_IRQ_PIC1);    /* but enable PIC0_IRQ_PIC1 */
 }
 
@@ -90 +89 @@
                     (uint8_t) (x & (~(irqmask & 0xff))));
         }
-        if (irqmask >> PIC_IRQ_COUNT) {
+        if (irqmask >> PIC0_IRQ_COUNT) {
                 x = pio_read_8(&saved_pic1->port2);
                 pio_write_8(&saved_pic1->port2,
-                    (uint8_t) (x & (~(irqmask >> PIC_IRQ_COUNT))));
+                    (uint8_t) (x & (~(irqmask >> PIC0_IRQ_COUNT))));
         }
 }
@@ -106 +105 @@
                     (uint8_t) (x | (irqmask & 0xff)));
         }
-        if (irqmask >> PIC_IRQ_COUNT) {
+        if (irqmask >> PIC0_IRQ_COUNT) {
                 x = pio_read_8(&saved_pic1->port2);
                 pio_write_8(&saved_pic1->port2,
-                    (uint8_t) (x | (irqmask >> PIC_IRQ_COUNT)));
+                    (uint8_t) (x | (irqmask >> PIC0_IRQ_COUNT)));
         }
 }
@@ -115 +114 @@
 void pic_eoi(unsigned int irq)
 {
-        if (irq >= PIC_IRQ_COUNT)
+        if (irq >= PIC0_IRQ_COUNT)
                 pio_write_8(&saved_pic1->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
         pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
@@ -126 +125 @@
         uint8_t isr_lo = pio_read_8(&saved_pic0->port1);
         uint8_t isr_hi = pio_read_8(&saved_pic1->port1);
-        return !(((isr_hi << PIC_IRQ_COUNT) | isr_lo) & (1 << irq));
+        return !(((isr_hi << PIC0_IRQ_COUNT) | isr_lo) & (1 << irq));
 }
 
@@ -132 +131 @@
 {
         /* For spurious IRQs from pic1, we need to isssue an EOI to pic0 */
-        if (irq >= PIC_IRQ_COUNT)
+        if (irq >= PIC0_IRQ_COUNT)
                 pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
 }