Changeset 3e1607f in mainline for arch/mips/src/exception.c

Timestamp:

2005-08-31T22:00:32Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

cd95d784

Parents:

d2bb9f8a

Message:

Add some comments.

File:

• arch/mips/src/exception.c (modified) (1 diff)

arch/mips/src/exception.c

@@ -40 +40 @@
         __u32 epc_shift = 0;
         pri_t pri;
-        
+
+        /*
+         * NOTE ON OPERATION ORDERING
+         *
+         * On entry, cpu_priority_high() must be called before exception bit is cleared.
+         * On exit, exception bit must be set before cpu_priority_restore() is called.
+         */
+
         pri = cpu_priority_high();
         epc = cp0_epc_read();