Changeset 41fa6f2 in mainline for arch/ia64/src/context.S
- Timestamp:
- 2006-03-16T17:01:51Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 46579c66
- Parents:
- 6eb103c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/context.S
r6eb103c r41fa6f2 105 105 */ 106 106 mov loc2 = pr ;; 107 st8 [in0] = loc2, 8 107 st8 [in0] = loc2, 16;; /*Next fpu registers should be spilled to 16B aligned address*/ 108 109 110 stf.spill [in0]=f2,16;; 111 stf.spill [in0]=f3,16;; 112 stf.spill [in0]=f4,16;; 113 stf.spill [in0]=f5,16;; 114 115 stf.spill [in0]=f16,16;; 116 stf.spill [in0]=f17,16;; 117 stf.spill [in0]=f18,16;; 118 stf.spill [in0]=f19,16;; 119 stf.spill [in0]=f20,16;; 120 stf.spill [in0]=f21,16;; 121 stf.spill [in0]=f22,16;; 122 stf.spill [in0]=f23,16;; 123 stf.spill [in0]=f24,16;; 124 stf.spill [in0]=f25,16;; 125 stf.spill [in0]=f26,16;; 126 stf.spill [in0]=f27,16;; 127 stf.spill [in0]=f28,16;; 128 stf.spill [in0]=f29,16;; 129 stf.spill [in0]=f30,16;; 130 stf.spill [in0]=f31,16;; 131 108 132 109 133 mov ar.unat = loc1 … … 188 212 * Restore predicate registers 189 213 */ 190 ld8 loc2 = [in0], 8;;214 ld8 loc2 = [in0], 16 ;; 191 215 mov pr = loc2, ~0 216 217 ldf.fill f2=[in0],16;; 218 ldf.fill f3=[in0],16;; 219 ldf.fill f4=[in0],16;; 220 ldf.fill f5=[in0],16;; 221 222 ldf.fill f16=[in0],16;; 223 ldf.fill f17=[in0],16;; 224 ldf.fill f18=[in0],16;; 225 ldf.fill f19=[in0],16;; 226 ldf.fill f20=[in0],16;; 227 ldf.fill f21=[in0],16;; 228 ldf.fill f22=[in0],16;; 229 ldf.fill f23=[in0],16;; 230 ldf.fill f24=[in0],16;; 231 ldf.fill f25=[in0],16;; 232 ldf.fill f26=[in0],16;; 233 ldf.fill f27=[in0],16;; 234 ldf.fill f28=[in0],16;; 235 ldf.fill f29=[in0],16;; 236 ldf.fill f30=[in0],16;; 237 ldf.fill f31=[in0],16;; 238 239 192 240 193 241 mov ar.unat = loc1
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