Ignore:
Timestamp:
2015-03-16T16:07:21Z (10 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2003739
Parents:
6069061 (diff), 795e2bf (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Mainline changes

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/mm/sun4u/tlb.c

    r6069061 r58775d30  
    194194
    195195/** ITLB miss handler. */
    196 void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate)
     196void fast_instruction_access_mmu_miss(unsigned int tt, istate_t *istate)
    197197{
    198198        size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
     
    224224 * low-level, assembly language part of the fast_data_access_mmu_miss handler.
    225225 *
    226  * @param tag           Content of the TLB Tag Access register as it existed
    227  *                      when the trap happened. This is to prevent confusion
    228  *                      created by clobbered Tag Access register during a nested
    229  *                      DTLB miss.
     226 * @param tt            Trap type.
    230227 * @param istate        Interrupted state saved on the stack.
    231228 */
    232 void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
    233 {
     229void fast_data_access_mmu_miss(unsigned int tt, istate_t *istate)
     230{
     231        tlb_tag_access_reg_t tag;
    234232        uintptr_t page_8k;
    235233        uintptr_t page_16k;
     
    238236        as_t *as = AS;
    239237
     238        tag.value = istate->tlb_tag_access;
    240239        page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH;
    241240        page_16k = ALIGN_DOWN(page_8k, PAGE_SIZE);
     
    276275/** DTLB protection fault handler.
    277276 *
    278  * @param tag           Content of the TLB Tag Access register as it existed
    279  *                      when the trap happened. This is to prevent confusion
    280  *                      created by clobbered Tag Access register during a nested
    281  *                      DTLB miss.
     277 * @param tt            Trap type.
    282278 * @param istate        Interrupted state saved on the stack.
    283279 */
    284 void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
    285 {
     280void fast_data_access_protection(unsigned int tt, istate_t *istate)
     281{
     282        tlb_tag_access_reg_t tag;
    286283        uintptr_t page_16k;
    287284        size_t index;
     
    289286        as_t *as = AS;
    290287
     288        tag.value = istate->tlb_tag_access;
    291289        page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE);
    292290        index = tag.vpn % MMU_PAGES_PER_PAGE;   /* 16K-page emulation */
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