Changeset 5d9e36b in mainline for boot/arch/arm32/src/mm.c
- Timestamp:
- 2012-12-30T13:32:58Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bfb57fb
- Parents:
- 949869d
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/mm.c
r949869d r5d9e36b 107 107 "mcr p15, 0, r0, c3, c0, 0\n" 108 108 109 #ifdef PROCESSOR_ armv7_a109 #ifdef PROCESSOR_ARCH_armv7_a 110 110 /* Read Auxiliary control register */ 111 111 "mrc p15, 0, r0, c1, c0, 1\n" … … 119 119 "mrc p15, 0, r0, c1, c0, 0\n" 120 120 121 #ifdef PROCESSOR_ armv7_a121 #ifdef PROCESSOR_ARCH_armv7_a 122 122 /* Mask to enable paging, I-cache D-cache and branch predict 123 123 * See kernel/arch/arm32/include/regutils.h for bit values.*/
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