Changeset 965dc18 in mainline for kernel/arch/sparc64/include/mm/cache_spec.h
- Timestamp:
- 2008-12-05T19:59:03Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 49093a4
- Parents:
- 0258e67
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/mm/cache_spec.h
r0258e67 r965dc18 39 39 * The following macros are valid for the following processors: 40 40 * 41 * UltraSPARC, UltraSPARC II, UltraSPARC IIi 41 * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, 42 * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ 42 43 * 43 44 * Should we support other UltraSPARC processors, we need to make sure that 44 45 * the macros are defined correctly for them. 45 46 */ 46 47 48 #if defined (US) 47 49 #define DCACHE_SIZE (16 * 1024) 50 #elif defined (US3) 51 #define DCACHE_SIZE (64 * 1024) 52 #endif 48 53 #define DCACHE_LINE_SIZE 32 49 50 #define ICACHE_SIZE (16 * 1024)51 #define ICACHE_WAYS 252 #define ICACHE_LINE_SIZE 3253 54 54 55 #endif
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