Changeset 98abd40 in mainline for uspace/lib/c/arch/ia32/src/fibril.S
- Timestamp:
- 2013-07-06T21:57:22Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- c8bb1633, cdc8a391
- Parents:
- b8e72fd1 (diff), 507c6f3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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uspace/lib/c/arch/ia32/src/fibril.S
rb8e72fd1 r98abd40 34 34 .global context_restore 35 35 36 37 36 ## Save current CPU context 38 37 # … … 41 40 # 42 41 context_save: 43 movl 0(%esp), %eax# the caller's return %eip44 movl 4(%esp), %edx# address of the context variable to save context to45 46 42 movl 0(%esp), %eax # the caller's return %eip 43 movl 4(%esp), %edx # address of the context variable to save context to 44 45 # save registers to the context structure 47 46 CONTEXT_SAVE_ARCH_CORE %edx %eax 48 49 # Save TLS47 48 # save TLS 50 49 movl %gs:0, %eax 51 50 movl %eax, OFFSET_TLS(%edx) # tls -> ctx->tls 52 51 53 xorl %eax, %eax# context_save returns 152 xorl %eax, %eax # context_save returns 1 54 53 incl %eax 55 54 ret 56 57 55 58 56 ## Restore saved CPU context … … 62 60 # 63 61 context_restore: 64 movl 4(%esp), %eax# address of the context variable to restore context from65 66 62 movl 4(%esp), %eax # address of the context variable to restore context from 63 64 # restore registers from the context structure 67 65 CONTEXT_RESTORE_ARCH_CORE %eax %edx 68 69 movl %edx, 0(%esp)# ctx->pc -> saver's return %eip70 71 # Set thread local storage66 67 movl %edx, 0(%esp) # ctx->pc -> saver's return %eip 68 69 # set thread local storage 72 70 pushl %edx 73 movl OFFSET_TLS(%eax), %edx 74 movl $1, %eax # Syscall SYS_TLS_SET71 movl OFFSET_TLS(%eax), %edx # Set arg1 to TLS addr 72 movl $1, %eax # Syscall SYS_TLS_SET 75 73 int $0x30 76 74 popl %edx 77 75 78 xorl %eax, %eax# context_restore returns 076 xorl %eax, %eax # context_restore returns 0 79 77 ret
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