Changeset a82500ce in mainline for arch/ia64/src/mm/tlb.c


Ignore:
Timestamp:
2006-03-12T17:32:01Z (19 years ago)
Author:
Jakub Vana <jakub.vana@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
de6b301
Parents:
12f952e5
Message:

Two frame stack (standard stack + RSE) on Itanium

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/ia64/src/mm/tlb.c

    r12f952e5 ra82500ce  
    8989{
    9090        /* TODO */
    91 }
     91        tlb_invalidate_all();
     92}
     93
     94
     95void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
     96{
     97
     98
     99}
     100
    92101
    93102/** Insert data into data translation cache.
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