Changeset b9f72b97 in mainline
- Timestamp:
- 2013-01-10T22:35:21Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7e87436
- Parents:
- 97718a5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/fpu_context.c
r97718a5 rb9f72b97 56 56 }; 57 57 58 extern uint32_t fpsid_read(void); 59 extern uint32_t mvfr0_read(void); 60 58 61 enum { 59 62 FPEXC_EX_FLAG = (1 << 31), 60 63 FPEXC_ENABLED_FLAG = (1 << 30), 61 64 }; 65 extern uint32_t fpexc_read(void); 66 extern void fpexc_write(uint32_t); 62 67 63 68 /** ARM Architecture Reference Manual ch. B4.1.58, p. B$-1551 */ … … 95 100 FPSCR_EN_ALL = FPSCR_DENORMAL_EN_FLAG | FPSCR_INEXACT_EN_FLAG | FPSCR_UNDERFLOW_EN_FLAG | FPSCR_OVERFLOW_EN_FLAG | FPSCR_ZERO_DIV_EN_FLAG | FPSCR_INVALID_OP_EN_FLAG, 96 101 }; 97 98 extern uint32_t fpsid_read(void);99 extern uint32_t mvfr0_read(void);100 102 extern uint32_t fpscr_read(void); 101 103 extern void fpscr_write(uint32_t); 102 extern uint32_t fpexc_read(void);103 extern void fpexc_write(uint32_t);104 104 105 105 extern void fpu_context_save_s32(fpu_context_t *);
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