Changeset bad1f53 in mainline for kernel/arch/arm32/include/cpu.h

Timestamp:

2013-01-19T16:35:17Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

827aae5

Parents:

5fcd537

Message:

arm32: Detect caches on armv7

File:

• kernel/arch/arm32/include/cpu.h (modified) (2 diffs)

kernel/arch/arm32/include/cpu.h

@@ -40 +40 @@
 #include <arch/asm.h>
 
+enum {
+        ARM_MAX_CACHE_LEVELS = 7,
+};
 
 /** Struct representing ARM CPU identification. */
@@ -57 +60 @@
         /** Revision number. */
         uint32_t rev_num;
+
+        struct {
+                unsigned ways;
+                unsigned sets;
+                unsigned line_size;
+                unsigned way_shift;
+                unsigned set_shift;
+        } dcache[ARM_MAX_CACHE_LEVELS];
+        unsigned dcache_levels;
 } cpu_arch_t;