Changeset bd48f4c in mainline for kernel/arch/ia64/include/mm/page.h

Timestamp:

2010-07-12T10:53:30Z (15 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

bd11d3e

Parents:

c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

File:

• kernel/arch/ia64/include/mm/page.h (modified) (6 diffs)

kernel/arch/ia64/include/mm/page.h

@@ -208 +208 @@
  * @return Address of the head of VHPT collision chain.
  */
-static inline uint64_t thash(uint64_t va)
+NO_TRACE static inline uint64_t thash(uint64_t va)
 {
         uint64_t ret;
@@ -230 +230 @@
  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  */
-static inline uint64_t ttag(uint64_t va)
+NO_TRACE static inline uint64_t ttag(uint64_t va)
 {
         uint64_t ret;
@@ -249 +249 @@
  * @return Current contents of rr[i].
  */
-static inline uint64_t rr_read(size_t i)
+NO_TRACE static inline uint64_t rr_read(size_t i)
 {
         uint64_t ret;
@@ -269 +269 @@
  * @param v Value to be written to rr[i].
  */
-static inline void rr_write(size_t i, uint64_t v)
+NO_TRACE static inline void rr_write(size_t i, uint64_t v)
 {
         ASSERT(i < REGION_REGISTERS);
@@ -284 +284 @@
  * @return Current value stored in PTA.
  */
-static inline uint64_t pta_read(void)
+NO_TRACE static inline uint64_t pta_read(void)
 {
         uint64_t ret;
@@ -300 +300 @@
  * @param v New value to be stored in PTA.
  */
-static inline void pta_write(uint64_t v)
+NO_TRACE static inline void pta_write(uint64_t v)
 {
         asm volatile (