Changeset dfd77382 in mainline for kernel/arch/sparc64/src/drivers/pci.c
- Timestamp:
- 2008-11-29T18:09:22Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8d2760f
- Parents:
- b17186d
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/drivers/pci.c
rb17186d rdfd77382 46 46 #include <arch/asm.h> 47 47 48 #define PCI_SABRE_REGS_REG 0 49 50 #define PCI_SABRE_IMAP_BASE 0x200 51 #define PCI_SABRE_ICLR_BASE 0x300 52 53 #define PCI_PSYCHO_REGS_REG 2 54 55 #define PCI_PSYCHO_IMAP_BASE 0x200 56 #define PCI_PSYCHO_ICLR_BASE 0x300 48 #define SABRE_INTERNAL_REG 0 49 #define PSYCHO_INTERNAL_REG 2 50 51 #define OBIO_IMR_BASE 0x200 52 #define OBIO_IMR(ino) (OBIO_IMR_BASE + ((ino) & INO_MASK)) 53 54 #define OBIO_CIR_BASE 0x300 55 #define OBIO_CIR(ino) (OBIO_CIR_BASE + ((ino) & INO_MASK)) 56 57 static void obio_enable_interrupt(pci_t *pci, int inr); 58 static void obio_clear_interrupt(pci_t *pci, int inr); 57 59 58 60 static pci_t *pci_sabre_init(ofw_tree_node_t *node); 59 static void pci_sabre_enable_interrupt(pci_t *pci, int inr);60 static void pci_sabre_clear_interrupt(pci_t *pci, int inr);61 62 61 static pci_t *pci_psycho_init(ofw_tree_node_t *node); 63 static void pci_psycho_enable_interrupt(pci_t *pci, int inr);64 static void pci_psycho_clear_interrupt(pci_t *pci, int inr);65 62 66 63 /** PCI operations for Sabre model. */ 67 64 static pci_operations_t pci_sabre_ops = { 68 .enable_interrupt = pci_sabre_enable_interrupt,69 .clear_interrupt = pci_sabre_clear_interrupt65 .enable_interrupt = obio_enable_interrupt, 66 .clear_interrupt = obio_clear_interrupt 70 67 }; 71 68 /** PCI operations for Psycho model. */ 72 69 static pci_operations_t pci_psycho_ops = { 73 .enable_interrupt = pci_psycho_enable_interrupt,74 .clear_interrupt = pci_psycho_clear_interrupt70 .enable_interrupt = obio_enable_interrupt, 71 .clear_interrupt = obio_clear_interrupt 75 72 }; 76 73 77 74 /** Initialize PCI controller (model Sabre). 78 75 * 79 * @param node 80 * 81 * @return 76 * @param node OpenFirmware device tree node of the Sabre. 77 * 78 * @return Address of the initialized PCI structure. 82 79 */ 83 80 pci_t *pci_sabre_init(ofw_tree_node_t *node) … … 96 93 count_t regs = prop->size / sizeof(ofw_upa_reg_t); 97 94 98 if (regs < PCI_SABRE_REGS_REG + 1)95 if (regs < SABRE_INTERNAL_REG + 1) 99 96 return NULL; 100 97 101 98 uintptr_t paddr; 102 if (!ofw_upa_apply_ranges(node->parent, ®[PCI_SABRE_REGS_REG], &paddr)) 99 if (!ofw_upa_apply_ranges(node->parent, ®[SABRE_INTERNAL_REG], 100 &paddr)) 103 101 return NULL; 104 102 … … 109 107 pci->model = PCI_SABRE; 110 108 pci->op = &pci_sabre_ops; 111 pci->reg = (uint64_t *) hw_map(paddr, reg[ PCI_SABRE_REGS_REG].size);109 pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size); 112 110 113 111 return pci; … … 117 115 /** Initialize the Psycho PCI controller. 118 116 * 119 * @param node 120 * 121 * @return 117 * @param node OpenFirmware device tree node of the Psycho. 118 * 119 * @return Address of the initialized PCI structure. 122 120 */ 123 121 pci_t *pci_psycho_init(ofw_tree_node_t *node) … … 136 134 count_t regs = prop->size / sizeof(ofw_upa_reg_t); 137 135 138 if (regs < P CI_PSYCHO_REGS_REG + 1)136 if (regs < PSYCHO_INTERNAL_REG + 1) 139 137 return NULL; 140 138 141 139 uintptr_t paddr; 142 if (!ofw_upa_apply_ranges(node->parent, ®[PCI_PSYCHO_REGS_REG], &paddr)) 140 if (!ofw_upa_apply_ranges(node->parent, ®[PSYCHO_INTERNAL_REG], 141 &paddr)) 143 142 return NULL; 144 143 … … 149 148 pci->model = PCI_PSYCHO; 150 149 pci->op = &pci_psycho_ops; 151 pci->reg = (uint64_t *) hw_map(paddr, reg[P CI_PSYCHO_REGS_REG].size);150 pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size); 152 151 153 152 return pci; 154 153 } 155 154 156 void pci_sabre_enable_interrupt(pci_t *pci, int inr) 157 { 158 pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; 159 } 160 161 void pci_sabre_clear_interrupt(pci_t *pci, int inr) 162 { 163 pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0; 164 } 165 166 void pci_psycho_enable_interrupt(pci_t *pci, int inr) 167 { 168 pci->reg[PCI_PSYCHO_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; 169 } 170 171 void pci_psycho_clear_interrupt(pci_t *pci, int inr) 172 { 173 pci->reg[PCI_PSYCHO_ICLR_BASE + (inr & INO_MASK)] = 0; 155 void obio_enable_interrupt(pci_t *pci, int inr) 156 { 157 pci->reg[OBIO_IMR(inr & INO_MASK)] |= IMAP_V_MASK; 158 } 159 160 void obio_clear_interrupt(pci_t *pci, int inr) 161 { 162 pci->reg[OBIO_CIR(inr & INO_MASK)] = 0; /* set IDLE */ 174 163 } 175 164 … … 216 205 void pci_enable_interrupt(pci_t *pci, int inr) 217 206 { 218 ASSERT(pci->model);219 207 ASSERT(pci->op && pci->op->enable_interrupt); 220 208 pci->op->enable_interrupt(pci, inr); … … 223 211 void pci_clear_interrupt(pci_t *pci, int inr) 224 212 { 225 ASSERT(pci->model);226 213 ASSERT(pci->op && pci->op->clear_interrupt); 227 214 pci->op->clear_interrupt(pci, inr);
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