Changeset e93bb24 in mainline

Timestamp:

2013-08-15T09:36:14Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

34847e2

Parents:

7bf9217

Message:

arm32: add details to comments

Location:

boot/arch/arm32/src

Files:

• asm.S (modified) (2 diffs)
• mm.c (modified) (1 diff)

boot/arch/arm32/src/asm.S

@@ -75 +75 @@
         bic     r4, r4, #(1 << CP15_C1_DC)
 
-        #Disable I-cache and Branche predicotrs on non-armv7
+        # Disable I-cache and Branche predictors.
         bic     r4, r4, #(1 << CP15_C1_IC)
         bic     r4, r4, #(1 << CP15_C1_BP)
@@ -88 +88 @@
         dsb
 #else
+        #cp15 dsb, r4 is ignored (should be zero)
         mov r4, #0
-        #cp15 dsb, r4 is ignored (should be zero)
         mcr p15, 0, r4, c7, c10, 4
 #endif
         
         # Clean ICache and BPredictors, r4 ignored (SBZ)
+        mov r4, #0
         mcr p15, 0, r4, c7, c5, 0
         nop

boot/arch/arm32/src/mm.c

@@ -169 +169 @@
          * Create 1:1 virtual-physical mapping.
          * Physical memory on BBxM a BBone starts at 2GB
-         * boundary, gta02 has a memory mirror at 2GB.
-         * icp somehow works (probably due to limited address size)
-         */
-        for (pfn_t page = 0; page < PTL0_ENTRIES; page++)
+         * boundary, icp has a memory mirror at 2GB.
+         * (ARM Integrator Core Module User guide ch. 6.3,  p. 6-7)
+         * gta02 somehow works (probably due to limited address size),
+         * s3c2442b manual ch. 5, p.5-1:
+         * "Address space: 128Mbytes per bank (total 1GB/8 banks)"
+         */
+        for (pfn_t page = 0; page < PTL0_ENTRIES; ++page)
                 init_ptl0_section(&boot_pt[page], page);