Changeset ecd1a0a in mainline

Timestamp:

2012-09-04T10:09:41Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

cc250b3

Parents:

c5b69a5e

Message:

arm32: Use FSR for data aborts on armv6+.

Location:

kernel/arch/arm32

Files:

• include/mm/page_fault.h (modified) (1 diff)
• src/mm/page_fault.c (modified) (5 diffs)

kernel/arch/arm32/include/mm/page_fault.h

@@ -40 +40 @@
 
 
-/** Decribes CP15 "fault status register" (FSR). */
-typedef struct {
-        unsigned status : 3;
-        unsigned domain : 4;
-        unsigned zero : 1;
-        unsigned should_be_zero : 24;
-} ATTRIBUTE_PACKED fault_status_t;
-
-
-/** Help union used for casting integer value into #fault_status_t. */
+/** Decribes CP15 "fault status register" (FSR).
+ *
+ * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743).
+ */
 typedef union {
-        fault_status_t fs;
-        uint32_t dummy;
-} fault_status_union_t;
+        struct {
+                unsigned status : 4;
+                unsigned domain : 4;
+                unsigned zero : 1;
+                unsigned sbz0 : 1;
+                unsigned fs : 1; /**< armv6+ mandated, earlier IPLM. DEFINED */
+                unsigned wr : 1; /**< armv6+ only */
+                unsigned should_be_zero : 20;
+        } ATTRIBUTE_PACKED data;
+        struct {
+                unsigned status : 4;
+                unsigned sbz0 : 6;
+                unsigned fs : 1;
+                unsigned should_be_zero : 21;
+        } ATTRIBUTE_PACKED inst;
+        uint32_t raw;
+} fault_status_t;
 
 

kernel/arch/arm32/src/mm/page_fault.c

@@ -42 +42 @@
 #include <print.h>
 
-/** Returns value stored in fault status register.
+/** Returns value stored in comnbined/data fault status register.
  *
  *  @return Value stored in CP15 fault status register (FSR).
- */
-static inline fault_status_t read_fault_status_register(void)
-{
-        fault_status_union_t fsu;
-        
-        /* fault status is stored in CP15 register 5 */
+ *
+ *  "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR.
+ *  It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of
+ *  the architecture. A write flag (bit[11] of the DFSR) has also been
+ *  introduced."
+ *  ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719)
+ *
+ *  See ch. B4.9.6 for location of data/instruction FSR.
+ *
+ */
+static inline fault_status_t read_data_fault_status_register(void)
+{
+        fault_status_t fsu;
+        
+        /* Combined/Data fault status is stored in CP15 register 5, c0. */
         asm volatile (
                 "mrc p15, 0, %[dummy], c5, c0, 0"
-                : [dummy] "=r" (fsu.dummy)
+                : [dummy] "=r" (fsu.raw)
         );
         
-        return fsu.fs;
-}
-
-/** Returns FAR (fault address register) content.
- *
- * @return FAR (fault address register) content (address that caused a page
+        return fsu;
+}
+
+/** Returns DFAR (fault address register) content.
+ *
+ * This register is equivalent to FAR on pre armv6 machines.
+ *
+ * @return DFAR (fault address register) content (address that caused a page
  *         fault)
  */
-static inline uintptr_t read_fault_address_register(void)
+static inline uintptr_t read_data_fault_address_register(void)
 {
         uintptr_t ret;
@@ -122 +133 @@
 }
 
+#if defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
 /** Decides whether read or write into memory is requested.
  *
@@ -166 +178 @@
         return PF_ACCESS_EXEC;
 }
+#endif
 
 /** Handles "data abort" exception (load or store at invalid address).
@@ -175 +188 @@
 void data_abort(unsigned int exc_no, istate_t *istate)
 {
-        fault_status_t fsr __attribute__ ((unused)) =
-            read_fault_status_register();
-        uintptr_t badvaddr = read_fault_address_register();
-
-        pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
-
+        uintptr_t badvaddr = read_data_fault_address_register();
+
+#if defined(PROCESSOR_armv6) | defined(PROCESSOR_armv7_a)
+        fault_status_t fsr = read_data_fault_status_register();
+        const pf_access_t access =
+            fsr.data.wr ? PF_ACCESS_WRITE : PF_ACCESS_READ;
+#elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
+        const pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
+#else
+#error "Unsupported architecture"
+#endif
         int ret = as_page_fault(badvaddr, access, istate);
 
@@ -197 +215 @@
 void prefetch_abort(unsigned int exc_no, istate_t *istate)
 {
+        /* NOTE: We should use IFAR and IFSR here. */
         int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate);