Changeset f4c9e42 in mainline

Timestamp:

2012-10-15T18:16:25Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

52fc805

Parents:

e9d636d0

Message:

rootamdm37x: COnvert usbhost cm and core cm to new pio functions.

Fix few incorrect values.

Location:

uspace/drv/infrastructure/rootamdm37x

Files:

• core_cm.h (modified) (1 diff)
• rootamdm37x.c (modified) (2 diffs)
• usbhost_cm.h (modified) (1 diff)

uspace/drv/infrastructure/rootamdm37x/core_cm.h

@@ -156 +156 @@
         uint32_t padd4_;
         ioport32_t clksel;
-#define CORE_CM_CLKSEL_CLKSEL_L3_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_L3_SHIFT  0
-#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED2  0x2
-#define CORE_CM_CLKSEL_CLKSEL_L4_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_L4_SHIFT  2
-#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED2  0x2
-#define CORE_CM_CLKSEL_CLKSEL_96M_MASK  0x3
-#define CORE_CM_CLKSEL_CLKSEL_96M_SHIFT  2
-#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED1  0x1
-#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED2  0x2
+#define CORE_CM_CLKSEL_CLKSEL_L3_MASK  (0x3 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED1  (0x1 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L3_DIVIDED2  (0x2 << 0)
+#define CORE_CM_CLKSEL_CLKSEL_L4_MASK  (0x3 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED1  (0x1 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_L4_DIVIDED2  (0x2 << 2)
+#define CORE_CM_CLKSEL_CLKSEL_96M_MASK  (0x3 << 12)
+#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED1  (0x1 << 12)
+#define CORE_CM_CLKSEL_CLKSEL_96M_DIVIDED2  (0x2 << 12)
 #define CORE_CM_CLKSEL_CLKSEL_GPT10_FLAG (1 << 6)
-#define CORE_CM_CLKSEL_CLKSEL_GPT11_FLAG (1 << 6)
+#define CORE_CM_CLKSEL_CLKSEL_GPT11_FLAG (1 << 7)
 
         uint32_t padd5_;
         ioport32_t clkstctrl;
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_MASK  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_SHIFT  0
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_EN  0x0
-#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_DIS  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_MASK  0x3
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_SHIFT  2
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_EN  0x0
-#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_DIS  0x3
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_MASK  (0x3 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_EN  (0x0 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L3_AUTO_DIS  (0x3 << 0)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_MASK  (0x3 << 2)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_EN  (0x0 << 2)
+#define CORE_CM_CLKCTRL_CLKCTRL_L4_AUTO_DIS  (0x3 << 2)
 
         const ioport32_t clkstst;
 #define CORE_CM_CLKSTST_CLKACTIVITY_L3_FLAG  (1 << 0)
 #define CORE_CM_CLKSTST_CLKACTIVITY_L4_FLAG  (1 << 1)
-
 } core_cm_regs_t;
 

uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c

@@ -122 +122 @@
         if (on) {
                 /* Enable interface and function clock for USB TLL */
-                device->cm.core->iclken3 |= CORE_CM_ICLKEN3_EN_USBTLL_FLAG;
-                device->cm.core->fclken3 |= CORE_CM_FCLKEN3_EN_USBTLL_FLAG;
+                pio_set_32(&device->cm.core->fclken3,
+                    CORE_CM_FCLKEN3_EN_USBTLL_FLAG, 5);
+                pio_set_32(&device->cm.core->iclken3,
+                    CORE_CM_ICLKEN3_EN_USBTLL_FLAG, 5);
 
                 /* Enable interface and function clock for USB hosts */
-                device->cm.usbhost->iclken |= USBHOST_CM_ICLKEN_EN_USBHOST;
-                device->cm.usbhost->fclken |= USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG;
-                device->cm.usbhost->fclken |= USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG;
+                pio_set_32(&device->cm.usbhost->fclken,
+                    USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG |
+                    USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG, 5);
+                pio_set_32(&device->cm.usbhost->iclken,
+                    USBHOST_CM_ICLKEN_EN_USBHOST, 5);
 #ifdef DEBUG_CM
         printf("DPLL5 (and everything else) should be on: %x %x.\n",
@@ -135 +139 @@
         } else {
                 /* Disable interface and function clock for USB hosts */
-                device->cm.usbhost->fclken &= ~USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG;
-                device->cm.usbhost->fclken &= ~USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG;
-                device->cm.usbhost->iclken &= ~USBHOST_CM_ICLKEN_EN_USBHOST;
+                pio_clear_32(&device->cm.usbhost->iclken,
+                    USBHOST_CM_ICLKEN_EN_USBHOST, 5);
+                pio_clear_32(&device->cm.usbhost->fclken,
+                    USBHOST_CM_FCLKEN_EN_USBHOST1_FLAG |
+                    USBHOST_CM_FCLKEN_EN_USBHOST2_FLAG, 5);
 
                 /* Disable interface and function clock for USB TLL */
-                device->cm.core->fclken3 &= ~CORE_CM_FCLKEN3_EN_USBTLL_FLAG;
-                device->cm.core->iclken3 &= ~CORE_CM_ICLKEN3_EN_USBTLL_FLAG;
+                pio_clear_32(&device->cm.core->iclken3,
+                    CORE_CM_ICLKEN3_EN_USBTLL_FLAG, 5);
+                pio_clear_32(&device->cm.core->fclken3,
+                    CORE_CM_FCLKEN3_EN_USBTLL_FLAG, 5);
         }
 

uspace/drv/infrastructure/rootamdm37x/usbhost_cm.h

@@ -65 +65 @@
 
         ioport32_t clkstctrl;
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_MASK  0x3
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_SHIFT  0
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_AUTO_DIS  0x0
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_SUPERVISED_SLEEP  0x1
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_SUPERVISED_WAKEUP  0x2
-#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_AUTO_EN  0x1
+#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_MASK  (0x3 << 0)
+#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_AUTO_DIS  (0x0 << 0)
+#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_SUPERVISED_SLEEP  (0x1 << 0)
+#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_SUPERVISED_WAKEUP  (0x2 << 0)
+#define USBHOST_CM_CLKSTCTRL_CLKSTCTRL_USBHOST_AUTO_EN  (0x3 << 0)
 
         ioport32_t clkstst;