Changeset f65b8e0c in mainline
- Timestamp:
- 2013-01-03T20:30:07Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2a8f38a
- Parents:
- 2a77eaa2
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/asm.h
r2a77eaa2 rf65b8e0c 50 50 * ARM926EJ-S uses the same coprocessor instruction as ARM920T. See ARM926EJ-S 51 51 * chapter 2.3.8 p.2-22 (52 in the PDF) 52 * 53 * @note Although mcr p15, 0, R0, c7, c0, 4 is defined in ARM Architecture 54 * reference manual for armv4/5 CP15 implementation is mandatory only for 55 * armv6+. 52 56 */ 53 57 NO_TRACE static inline void cpu_sleep(void) 54 58 { 55 59 #ifdef PROCESSOR_ARCH_armv7_a 56 asm volatile ( "wfe" ::);57 #elif defined( MACHINE_gta02) | defined(MACHINE_integratorcp)58 asm volatile ( "mcr p15, 0,R0,c7,c0,4" ::);60 asm volatile ( "wfe" ); 61 #elif defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_arm926ej_s) | defined(PROCESSOR_arm920t) 62 asm volatile ( "mcr p15, 0, R0, c7, c0, 4" ); 59 63 #endif 60 64 }
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