Changeset fe32163 in mainline for kernel/arch/ia32/include/smp/smp.h

Timestamp:

2010-06-29T00:08:48Z (14 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c19aa612

Parents:

9a21f9d

Message:

improve support for inactive CPUs
major revision of MADT and MPS parsing code
limit the number of active CPUs on ia32 and amd64 to 8 (actually the APIC ID of all active CPUs must be in the range 0 .. 7 to avoid tripping on an assertion in APIC code)
fix off-by-one bug in MADT parsing code (missing the last entry)

File:

• kernel/arch/ia32/include/smp/smp.h (modified) (2 diffs)

kernel/arch/ia32/include/smp/smp.h

@@ -27 +27 @@
  */
 
-/** @addtogroup ia32    
+/** @addtogroup ia32
  * @{
  */
@@ -40 +40 @@
 /** SMP config opertaions interface. */
 struct smp_config_operations {
-        size_t (* cpu_count)(void);             /**< Return number of detected processors. */
-        bool (* cpu_enabled)(size_t i); /**< Check whether the processor of index i is enabled. */
-        bool (*cpu_bootstrap)(size_t i);        /**< Check whether the processor of index i is BSP. */
-        uint8_t (*cpu_apic_id)(size_t i);               /**< Return APIC ID of the processor of index i. */
-        int (*irq_to_pin)(unsigned int irq);            /**< Return mapping between irq and APIC pin. */
+        /** Check whether a processor is enabled. */
+        bool (* cpu_enabled)(size_t);
+        
+        /** Check whether a processor is BSP. */
+        bool (*cpu_bootstrap)(size_t);
+        
+        /** Return APIC ID of a processor. */
+        uint8_t (*cpu_apic_id)(size_t);
+        
+        /** Return mapping between IRQ and APIC pin. */
+        int (*irq_to_pin)(unsigned int);
 };
 
-extern int smp_irq_to_pin(unsigned int irq);
+extern int smp_irq_to_pin(unsigned int);
 
 #endif