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00035 #include <arch/pm.h>
00036 #include <config.h>
00037 #include <arch/types.h>
00038 #include <typedefs.h>
00039 #include <arch/interrupt.h>
00040 #include <arch/asm.h>
00041 #include <arch/context.h>
00042 #include <panic.h>
00043 #include <arch/mm/page.h>
00044 #include <mm/slab.h>
00045 #include <memstr.h>
00046 #include <arch/boot/boot.h>
00047 #include <interrupt.h>
00048
00049
00050
00051
00052
00053
00054
00055
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00057
00058
00059
00060
00061 descriptor_t gdt[GDT_ITEMS] = {
00062
00063 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
00064
00065 { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
00066
00067 { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
00068
00069 { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
00070
00071 { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
00072
00073 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
00074
00075 { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
00076
00077 #ifdef CONFIG_FB
00078 { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
00079 #endif
00080 };
00081
00082 static idescriptor_t idt[IDT_ITEMS];
00083
00084 static tss_t tss;
00085
00086 tss_t *tss_p = NULL;
00087
00088
00089 ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
00090 ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
00091
00092 void gdt_setbase(descriptor_t *d, __address base)
00093 {
00094 d->base_0_15 = base & 0xffff;
00095 d->base_16_23 = ((base) >> 16) & 0xff;
00096 d->base_24_31 = ((base) >> 24) & 0xff;
00097 }
00098
00099 void gdt_setlimit(descriptor_t *d, __u32 limit)
00100 {
00101 d->limit_0_15 = limit & 0xffff;
00102 d->limit_16_19 = (limit >> 16) & 0xf;
00103 }
00104
00105 void idt_setoffset(idescriptor_t *d, __address offset)
00106 {
00107
00108
00109
00110 d->offset_0_15 = offset & 0xffff;
00111 d->offset_16_31 = offset >> 16;
00112 }
00113
00114 void tss_initialize(tss_t *t)
00115 {
00116 memsetb((__address) t, sizeof(struct tss), 0);
00117 }
00118
00119
00120
00121
00122 void idt_init(void)
00123 {
00124 idescriptor_t *d;
00125 int i;
00126
00127 for (i = 0; i < IDT_ITEMS; i++) {
00128 d = &idt[i];
00129
00130 d->unused = 0;
00131 d->selector = selector(KTEXT_DES);
00132
00133 d->access = AR_PRESENT | AR_INTERRUPT;
00134
00135 if (i == VECTOR_SYSCALL) {
00136
00137
00138
00139 d->access |= DPL_USER;
00140 }
00141
00142 idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size);
00143 exc_register(i, "undef", (iroutine) null_interrupt);
00144 }
00145 exc_register(13, "gp_fault", (iroutine) gp_fault);
00146 exc_register( 7, "nm_fault", (iroutine) nm_fault);
00147 exc_register(12, "ss_fault", (iroutine) ss_fault);
00148 exc_register(19, "simd_fp", (iroutine) simd_fp_exception);
00149 }
00150
00151
00152
00153 static void clean_IOPL_NT_flags(void)
00154 {
00155 __asm__ volatile (
00156 "pushfl\n"
00157 "pop %%eax\n"
00158 "and $0xffff8fff, %%eax\n"
00159 "push %%eax\n"
00160 "popfl\n"
00161 : : : "eax"
00162 );
00163 }
00164
00165
00166 static void clean_AM_flag(void)
00167 {
00168 __asm__ volatile (
00169 "mov %%cr0, %%eax\n"
00170 "and $0xfffbffff, %%eax\n"
00171 "mov %%eax, %%cr0\n"
00172 : : : "eax"
00173 );
00174 }
00175
00176 void pm_init(void)
00177 {
00178 descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
00179 ptr_16_32_t idtr;
00180
00181
00182
00183
00184 idtr.limit = sizeof(idt);
00185 idtr.base = (__address) idt;
00186 gdtr_load(&gdtr);
00187 idtr_load(&idtr);
00188
00189
00190
00191
00192
00193
00194 if (config.cpu_active == 1) {
00195 idt_init();
00196
00197
00198
00199
00200 tss_p = &tss;
00201 }
00202 else {
00203 tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
00204 if (!tss_p)
00205 panic("could not allocate TSS\n");
00206 }
00207
00208 tss_initialize(tss_p);
00209
00210 gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
00211 gdt_p[TSS_DES].special = 1;
00212 gdt_p[TSS_DES].granularity = 0;
00213
00214 gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
00215 gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
00216
00217
00218
00219
00220
00221 tr_load(selector(TSS_DES));
00222
00223 clean_IOPL_NT_flags();
00224 clean_AM_flag();
00225 }
00226
00227 void set_tls_desc(__address tls)
00228 {
00229 ptr_16_32_t cpugdtr;
00230 descriptor_t *gdt_p;
00231
00232 gdtr_store(&cpugdtr);
00233 gdt_p = (descriptor_t *) cpugdtr.base;
00234 gdt_setbase(&gdt_p[TLS_DES], tls);
00235
00236 gdtr_load(&cpugdtr);
00237 }
00238