Opened 9 years ago
Closed 9 years ago
#637 closed defect (fixed)
Do not set bits 13:0 in CP15 register 2 on ARM920T
Reported by: | Jakub Jermář | Owned by: | Jiri Svoboda |
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Priority: | major | Milestone: | 0.7.0 |
Component: | helenos/kernel/arm32 | Version: | mainline |
Keywords: | ARM920T, ARMv4, gta02 | Cc: | |
Blocker for: | Depends on: | ||
See also: |
Description
ARM920T defines bits 13:0 of CP15 register 2 (translation table base) as reserved, yet the boot initialization code in boot/arch/arm32/src/mm.c and the page table management code in kernel/arch/arm32/include/arch/mm/page.h set them as if a newer version of the architecture was guaranteed:
static void init_boot_pt(void) { ... uint32_t val = (uint32_t)boot_pt & TTBR_ADDR_MASK; val |= TTBR_RGN_WBWA_CACHE | TTBR_C_FLAG; TTBR0_write(val); }
NO_TRACE static inline void set_ptl0_addr(pte_t *pt) { uint32_t val = (uint32_t)pt & TTBR_ADDR_MASK; val |= TTBR_RGN_WBWA_CACHE | TTBR_C_FLAG; TTBR0_write(val); }
Change History (2)
comment:1 by , 9 years ago
Component: | helenos/unspecified → helenos/kernel/arm32 |
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Keywords: | ARM920T ARMv4 gta02 added |
Milestone: | → 0.7.0 |
Owner: | set to |
comment:2 by , 9 years ago
Resolution: | → fixed |
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Status: | new → closed |
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Fix merged in mainline,2399.