Changeset 005b765 in mainline for kernel/arch/arm32/include/mm/page_fault.h

Timestamp:

2013-01-24T22:07:06Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

03362fbd, 3acd1bb, d59c046

Parents:

6218d4b (diff), 24bead17 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge arm improvements.

Speed up boot by enabling caches early (but disable before jumping to kernel).
Add cycle counters on armv7.
Move bbxm dispc driver to uspace.
Add arm PROCESSOR and PROCESSOR_ARCH defines.

File:

• kernel/arch/arm32/include/mm/page_fault.h (modified) (1 diff)

kernel/arch/arm32/include/mm/page_fault.h

@@ -42 +42 @@
 /** Decribes CP15 "fault status register" (FSR).
  *
- * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743).
+ * "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR.
+ * It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of
+ * the architecture. A write flag (bit[11] of the DFSR) has also been
+ * introduced."
+ * ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719)
+ *
+ * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743). for FSR info
  */
 typedef union {