Changeset 0c40fd5 in mainline for kernel/arch/arm32/src/cpu/cpu.c

Timestamp:
2013-08-07T18:38:44Z (11 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ae5fb7c8
Parents:
8ff767b
Message:

arm32: Fix pagetables in cacheable memory.

Set memory attributes in TTBR0/1

(No files)

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