Changeset 11928d5 in mainline for arch/amd64/include/asm.h

Timestamp:

2006-04-28T14:32:44Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a98cdc7

Parents:

040e4e9

Message:

Fix BITS2BYTES macro to return 0 when passed 0 as argument.
Fix ia32 TSS segment granularity to be 0.
Fix ia32 and amd64 initial TSS limit to be 103.
Little textual changes here and there.

File:

• arch/amd64/include/asm.h (modified) (3 diffs)

arch/amd64/include/asm.h

@@ -208 +208 @@
 static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
 {
-        __asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -217 +217 @@
 static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
 {
-        __asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
+        __asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -226 +226 @@
 static inline void idtr_load(struct ptr_16_64 *idtr_reg)
 {
-        __asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));
+        __asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg));
 }