Changeset 11928d5 in mainline for arch/ia32/include/smp/apic.h

Timestamp:

2006-04-28T14:32:44Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a98cdc7

Parents:

040e4e9

Message:

Fix BITS2BYTES macro to return 0 when passed 0 as argument.
Fix ia32 TSS segment granularity to be 0.
Fix ia32 and amd64 initial TSS limit to be 103.
Little textual changes here and there.

File:

• arch/ia32/include/smp/apic.h (modified) (4 diffs)

arch/ia32/include/smp/apic.h

@@ -128 +128 @@
 typedef struct icr icr_t;
 
-/* End Of Interrupt */
+/* End Of Interrupt. */
 #define EOI             (0x0b0/sizeof(__u32))
 
@@ -252 +252 @@
 typedef union l_apic_id l_apic_id_t;
 
-/* Local APIC Version Register */
+/** Local APIC Version Register */
 #define LAVR            (0x030/sizeof(__u32))
 #define LAVR_Mask       0xff
@@ -264 +264 @@
         __u32 value;
         struct {
-                unsigned : 24;          /**< Reserver. */
+                unsigned : 24;          /**< Reserved. */
                 __u8 id;                /**< Logical APIC ID. */
         } __attribute__ ((packed));
@@ -320 +320 @@
                 struct {
                         unsigned : 24;                  /**< Reserved. */
-                        __u8 dest : 8;          /**< Destination Field. */
+                        __u8 dest : 8;                  /**< Destination Field. */
                 } __attribute__ ((packed));
         };