Changeset 22f7769 in mainline for arch/mips32/src/exception.c

Timestamp:

2005-10-17T23:31:41Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

4b2c872d

Parents:

75eacab

Message:

Rename cpu_priority_{high|low|restore|read} functions to interrupts_{disable|enable|restore|read}.
Rename pri_t to ipl_t (Interrupt Priority Level).
Rename thread_t::pri to thread_t::priority.

File:

• arch/mips32/src/exception.c (modified) (1 diff)

arch/mips32/src/exception.c

@@ -47 +47 @@
          * NOTE ON OPERATION ORDERING
          *
-         * On entry, cpu_priority_high() must be called before 
+         * On entry, interrupts_disable() must be called before 
          * exception bit is cleared.
          */
 
-        cpu_priority_high();
+        interrupts_disable();
         cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
                                                 cp0_status_um_bit));