Changeset 75e1db0 in mainline for arch/sparc64/include/asm.h

Timestamp:

2005-12-19T22:41:07Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

d6e8529

Parents:

031e264

Message:

sparc64 work.
Implement interrupt_disable(), interrupt_enable(), interrupt_restore() and interrupt_read() functions.
Fix context save/restore to save/restore register %i7.

File:

• arch/sparc64/include/asm.h (modified) (6 diffs)

arch/sparc64/include/asm.h

@@ -30 +30 @@
 #define __sparc64_ASM_H__
 
+#include <typedefs.h>
 #include <arch/types.h>
+#include <arch/register.h>
 #include <config.h>
+
+/** Read Processor State register.
+ *
+ * @return Value of PSTATE register.
+ */
+static inline __u64 pstate_read(void)
+{
+        __u64 v;
+        
+        __asm__ volatile ("rdpr %%pstate, %0\n" : "=r" (v));
+        
+        return v;
+}
+
+/** Write Processor State register.
+ *
+ * @param New value of PSTATE register.
+ */
+static inline void pstate_write(__u64 v)
+{
+        __asm__ volatile ("wrpr %0, %1, %%pstate\n" : : "r" (v), "i" (0));
+}
+
 
 /** Enable interrupts.
@@ -41 +66 @@
  */
 static inline ipl_t interrupts_enable(void) {
+        pstate_reg_t pstate;
+        __u64 value;
+        
+        value = pstate_read();
+        pstate.value = value;
+        pstate.ie = true;
+        pstate_write(pstate.value);
+        
+        return (ipl_t) value;
 }
 
@@ -51 +85 @@
  */
 static inline ipl_t interrupts_disable(void) {
+        pstate_reg_t pstate;
+        __u64 value;
+        
+        value = pstate_read();
+        pstate.value = value;
+        pstate.ie = false;
+        pstate_write(pstate.value);
+        
+        return (ipl_t) value;
 }
 
@@ -60 +103 @@
  */
 static inline void interrupts_restore(ipl_t ipl) {
+        pstate_reg_t pstate;
+        
+        pstate.value = pstate_read();
+        pstate.ie = ((pstate_reg_t) ipl).ie;
+        pstate_write(pstate.value);
 }
 
@@ -69 +117 @@
  */
 static inline ipl_t interrupts_read(void) {
+        return (ipl_t) pstate_read();
 }
 
@@ -81 +130 @@
         __address v;
         
-        __asm__ volatile ("and %%o6, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+        __asm__ volatile ("and %%sp, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
         
         return v;