Changeset c90aed4 in mainline for uspace/drv/bus/pci/pciintel/pci_regs.h
- Timestamp:
- 2013-05-23T17:25:28Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 192565b, 94dfb92
- Parents:
- 4a5a18be
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/pci/pciintel/pci_regs.h
r4a5a18be rc90aed4 95 95 #define PCI_BRIDGE_CTL 0x3E 96 96 97 /* PCI command flags */ 98 #define PCI_COMMAND_IO 0x001 99 #define PCI_COMMAND_MEMORY 0x002 100 #define PCI_COMMAND_MASTER 0x004 101 #define PCI_COMMAND_SPECIAL 0x008 102 #define PCI_COMMAND_INVALIDATE 0x010 103 #define PCI_COMMAND_VGA_PALETTE 0x020 104 #define PCI_COMMAND_PARITY 0x040 105 #define PCI_COMMAND_WAIT 0x080 106 #define PCI_COMMAND_SERR 0x100 107 #define PCI_COMMAND_FAST_BACK 0x200 108 #define PCI_COMMAND_INTX_DISABLE 0x400 109 97 110 #endif 98 111
Note:
See TracChangeset
for help on using the changeset viewer.