Changeset dd0c8a0 in mainline for uspace/lib/c/generic/device/hw_res.c
- Timestamp:
- 2013-09-29T06:56:33Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a9bd960d
- Parents:
- 3deb0155 (diff), 13be2583 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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links above to see all the changes relative to each parent. - File:
-
- 1 edited
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uspace/lib/c/generic/device/hw_res.c
r3deb0155 rdd0c8a0 44 44 45 45 async_exch_t *exch = async_exchange_begin(sess); 46 46 47 int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 47 48 HW_RES_GET_RESOURCE_LIST, &count); … … 77 78 { 78 79 async_exch_t *exch = async_exchange_begin(sess); 80 79 81 int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 80 82 HW_RES_ENABLE_INTERRUPT); … … 84 86 } 85 87 88 /** Setup DMA channel to specified place and mode. 89 * 90 * @param channel DMA channel. 91 * @param pa Physical address of the buffer. 92 * @param size DMA buffer size. 93 * @param mode Mode of the DMA channel: 94 * - Read or Write 95 * - Allow automatic reset 96 * - Use address decrement instead of increment 97 * - Use SINGLE/BLOCK/ON DEMAND transfer mode 98 * 99 * @return Error code. 100 * 101 */ 102 int hw_res_dma_channel_setup(async_sess_t *sess, 103 unsigned channel, uint32_t pa, uint32_t size, uint8_t mode) 104 { 105 async_exch_t *exch = async_exchange_begin(sess); 106 107 const uint32_t packed = (channel & 0xffff) | (mode << 16); 108 const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 109 HW_RES_DMA_CHANNEL_SETUP, packed, pa, size); 110 111 async_exchange_end(exch); 112 113 return ret; 114 } 115 116 /** Query remaining bytes in the buffer. 117 * 118 * @param channel DMA channel. 119 * 120 * @return Number of bytes remaining in the buffer if positive. 121 * @return Error code if negative. 122 * 123 */ 124 int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel) 125 { 126 async_exch_t *exch = async_exchange_begin(sess); 127 128 sysarg_t remain; 129 const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 130 HW_RES_DMA_CHANNEL_REMAIN, channel, &remain); 131 132 async_exchange_end(exch); 133 134 if (ret == EOK) 135 return remain; 136 137 return ret; 138 } 139 86 140 /** @} 87 141 */
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