Changeset 52fc805 in mainline for uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c
- Timestamp:
- 2012-10-15T19:27:58Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a5a73c0
- Parents:
- f4c9e42
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c
rf4c9e42 r52fc805 164 164 165 165 /* Reset USB TLL */ 166 device->tll->sysconfig |= TLL_SYSCONFIG_SOFTRESET_FLAG;166 pio_set_32(&device->tll->sysconfig, TLL_SYSCONFIG_SOFTRESET_FLAG, 5); 167 167 ddf_msg(LVL_DEBUG2, "Waiting for USB TLL reset"); 168 while (!( device->tll->sysstatus& TLL_SYSSTATUS_RESET_DONE_FLAG));168 while (!(pio_read_32(&device->tll->sysstatus) & TLL_SYSSTATUS_RESET_DONE_FLAG)); 169 169 ddf_msg(LVL_DEBUG, "USB TLL Reset done."); 170 170 171 {172 171 /* Setup idle mode (smart idle) */ 173 uint32_t sysc = device->tll->sysconfig; 174 sysc |= TLL_SYSCONFIG_CLOCKACTIVITY_FLAG | TLL_SYSCONFIG_AUTOIDLE_FLAG; 175 sysc = (sysc 176 & ~(TLL_SYSCONFIG_SIDLE_MODE_MASK << TLL_SYSCONFIG_SIDLE_MODE_SHIFT) 177 ) | (0x2 << TLL_SYSCONFIG_SIDLE_MODE_SHIFT); 178 device->tll->sysconfig = sysc; 179 ddf_msg(LVL_DEBUG2, "Set TLL->sysconfig (%p) to %x:%x.", 180 &device->tll->sysconfig, device->tll->sysconfig, sysc); 181 } 182 183 { 172 pio_change_32(&device->tll->sysconfig, 173 TLL_SYSCONFIG_CLOCKACTIVITY_FLAG | TLL_SYSCONFIG_AUTOIDLE_FLAG | 174 TLL_SYSCONFIG_SIDLE_MODE_SMART, TLL_SYSCONFIG_SIDLE_MODE_MASK, 5); 175 184 176 /* Smart idle for UHH */ 185 uint32_t sysc = device->uhh->sysconfig; 186 sysc |= UHH_SYSCONFIG_CLOCKACTIVITY_FLAG | UHH_SYSCONFIG_AUTOIDLE_FLAG; 187 sysc = (sysc 188 & ~(UHH_SYSCONFIG_SIDLE_MODE_MASK << UHH_SYSCONFIG_SIDLE_MODE_SHIFT) 189 ) | (0x2 << UHH_SYSCONFIG_SIDLE_MODE_SHIFT); 190 sysc = (sysc 191 & ~(UHH_SYSCONFIG_MIDLE_MODE_MASK << UHH_SYSCONFIG_MIDLE_MODE_SHIFT) 192 ) | (0x2 << UHH_SYSCONFIG_MIDLE_MODE_SHIFT); 193 ddf_msg(LVL_DEBUG2, "Set UHH->sysconfig (%p) to %x.", 194 &device->uhh->sysconfig, device->uhh->sysconfig); 195 device->uhh->sysconfig = sysc; 196 197 /* All ports are connected on BBxM */ 198 device->uhh->hostconfig |= (UHH_HOSTCONFIG_P1_CONNECT_STATUS_FLAG 199 | UHH_HOSTCONFIG_P2_CONNECT_STATUS_FLAG 200 | UHH_HOSTCONFIG_P3_CONNECT_STATUS_FLAG); 177 pio_change_32(&device->uhh->sysconfig, 178 UHH_SYSCONFIG_CLOCKACTIVITY_FLAG | UHH_SYSCONFIG_AUTOIDLE_FLAG | 179 UHH_SYSCONFIG_SIDLE_MODE_SMART, UHH_SYSCONFIG_SIDLE_MODE_MASK, 5); 201 180 202 181 /* Set all ports to go through TLL(UTMI) 203 182 * Direct connection can only work in HS mode */ 204 device->uhh->hostconfig |= (UHH_HOSTCONFIG_P1_ULPI_BYPASS_FLAG 205 | UHH_HOSTCONFIG_P2_ULPI_BYPASS_FLAG 206 | UHH_HOSTCONFIG_P3_ULPI_BYPASS_FLAG); 207 ddf_msg(LVL_DEBUG2, "Set UHH->hostconfig (%p) to %x.", 208 &device->uhh->hostconfig, device->uhh->hostconfig); 209 } 210 211 device->tll->shared_conf |= TLL_SHARED_CONF_FCLK_IS_ON_FLAG; 212 ddf_msg(LVL_DEBUG2, "Set shared conf port (%p) to %x.", 213 &device->tll->shared_conf, device->tll->shared_conf); 183 pio_set_32(&device->uhh->hostconfig, 184 UHH_HOSTCONFIG_P1_ULPI_BYPASS_FLAG | 185 UHH_HOSTCONFIG_P2_ULPI_BYPASS_FLAG | 186 UHH_HOSTCONFIG_P3_ULPI_BYPASS_FLAG, 5); 187 188 /* What is this? */ 189 pio_set_32(&device->tll->shared_conf, TLL_SHARED_CONF_FCLK_IS_ON_FLAG, 5); 214 190 215 191 for (unsigned i = 0; i < 3; ++i) { 216 uint32_t ch = device->tll->channel_conf[i]; 217 /* Clear Channel mode and FSLS mode */ 218 ch &= ~(TLL_CHANNEL_CONF_CHANMODE_MASK 219 << TLL_CHANNEL_CONF_CHANMODE_SHIFT) 220 & ~(TLL_CHANNEL_CONF_FSLSMODE_MASK 221 << TLL_CHANNEL_CONF_FSLSMODE_SHIFT); 222 223 /* Serial mode is the only one capable of FS/LS operation. */ 224 ch |= (TLL_CHANNEL_CONF_CHANMODE_UTMI_SERIAL_MODE 225 << TLL_CHANNEL_CONF_CHANMODE_SHIFT); 226 227 /* Select FS/LS mode, no idea what the difference is 192 /* Serial mode is the only one capable of FS/LS operation. 193 * Select FS/LS mode, no idea what the difference is 228 194 * one of bidirectional modes might be good choice 229 195 * 2 = 3pin bidi phy. */ 230 ch |= (2 << TLL_CHANNEL_CONF_FSLSMODE_SHIFT); 231 232 /* Write to register */ 233 ddf_msg(LVL_DEBUG2, "Setting port %u(%p) to %x.", 234 i, &device->tll->channel_conf[i], ch); 235 device->tll->channel_conf[i] = ch; 196 pio_change_32(&device->tll->channel_conf[i], 197 TLL_CHANNEL_CONF_CHANMODE_UTMI_SERIAL_MODE | 198 TLL_CHANNEL_CONF_FSLSMODE_3PIN_BIDI_PHY, 199 TLL_CHANNEL_CONF_CHANMODE_MASK | 200 TLL_CHANNEL_CONF_FSLSMODE_MASK, 5); 236 201 } 237 202 return EOK;
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