Changeset 5f310ec8 in mainline for uspace/app/trace/trace.c

Timestamp:

2015-09-16T18:52:13Z (9 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a1d636e

Parents:

996dc042

Message:

Access CP15 register 8 wrt. target architecture and implementation

CP15 register 8 controls the TLB(s).

• Do not define macros for functionality which is not supported by the target architecture or implementation.
• For ARM920T implementation, do not use TLBIMVA in invalidate_page().

(No files)