Changeset a1d636e in mainline for uspace/app/trace/trace.c

Timestamp:

2015-09-17T07:19:30Z (9 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f834cc32

Parents:

5f310ec8

Message:

Access CP15 register 2 wrt. target architecture and implementation

CP15 register 2 controls the Translation Table Base and Translation
Table Base Control registers.

• Do not define macros for functionality which is not supported by the target architecture or implementation.
• ARMv4 and ARMv5 define bits 13:0 as unpredictable/should be zero.

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