Changeset 86b31ba9 in mainline for kernel/arch/sparc64/include/barrier.h
- Timestamp:
- 2006-09-26T16:12:38Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a9ac978
- Parents:
- 26678e5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/barrier.h
r26678e5 r86b31ba9 37 37 38 38 /* 39 * TODO: Implement true SPARC V9 memory barriers for macros below. 39 * We assume TSO memory model in which only reads can pass earlier stores 40 * (but not earlier reads). Therefore, CS_ENTER_BARRIER() and CS_LEAVE_BARRIER() 41 * can be empty. 40 42 */ 41 43 #define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory")
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