Changeset c9b8c5c in mainline for arch/ia32/src/smp/mp.c


Ignore:
Timestamp:
2005-04-24T21:59:33Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ad36bd6
Parents:
f07bba5
Message:

APIC changes and fixes.
Be more robust during MP configuration.

Do not use APIC ID as CPU_ID_ARCH anymore.
Changing APIC ID's is not a good idea.
Use dr0 register instead.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/ia32/src/smp/mp.c

    rf07bba5 rc9b8c5c  
    487487                if (pr[i].cpu_flags & (1<<0) == 0)
    488488                        continue;
    489        
     489
    490490                /*
    491491                 * The bootstrap processor is already up.
     
    493493                if (pr[i].cpu_flags & (1<<1))
    494494                        continue;
     495
     496                if (pr[i].l_apic_id == l_apic_id()) {
     497                        printf("%X: bad processor entry #%d, will not send IPI to myself\n", &pr[i], i);
     498                        continue;
     499                }
    495500               
    496501                /*
     
    502507                memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
    503508                gdtr.base = (__address) gdt_new;
    504                
     509
    505510                if (l_apic_send_init_ipi(pr[i].l_apic_id)) {
    506511                        /*
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