Changeset ed166f7 in mainline for kernel/arch/sparc64/src/asm.S

Timestamp:

2006-08-31T18:53:14Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6767c1d

Parents:

e0b241f

Message:

A lot of untested sparc64 stuff:

• Write ASID to hardware when a thread is about to run in userspace.
• Add userspace() and switch_to_userspace() functions.
• Handle special cases when the userspace spill/fill handler causes MMU trap.
• Resolve some TODOs in the existing sparc64 code.
• sparc64 has now C99 compliant header guards.
• Formatting and indentation fixes.

File:

• kernel/arch/sparc64/src/asm.S (modified) (2 diffs)

kernel/arch/sparc64/src/asm.S

@@ -29 +29 @@
 #include <arch/stack.h>
 #include <arch/regdef.h>
+#include <arch/mm/mmu.h>
 
 .text
@@ -144 +145 @@
 read_from_ag_g7:
         READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
+
+
+/** Switch to userspace.
+ *
+ * %o0  Userspace entry address.
+ * %o1  Userspace stack pointer address.
+ */
+.global switch_to_userspace
+switch_to_userspace:
+        flushw
+        wrpr %g0, 0, %cleanwin          ! avoid information leak
+        save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+
+        clr %i2
+        clr %i3
+        clr %i4
+        clr %i5
+        clr %i6
+
+        wrpr %g0, 1, %tl                ! enforce mapping via nucleus
+
+        rdpr %cwp, %g1
+        wrpr %g1, TSTATE_IE_BIT, %tstate
+        wrpr %i0, 0, %tnpc
+        
+        /*
+         * Set primary context according to secondary context.
+         * Secondary context has been already installed by
+         * higher-level functions.
+         */
+        wr %g0, ASI_DMMU, %asi
+        ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
+        stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
+        flush %i7
+        
+        done                            ! jump to userspace